1. Field of the Invention
The present invention relates to flash memory technology, and more particularly to techniques for managing data for high speed, random access in flash memory devices.
2. Description of Related Art
Electrically Erasable Programmable Read-Only Memory (EEPROM) and flash memory include memory cells that store charge between the channel and gate of a field effect transistor. The charge stored affects the threshold voltage of the transistor, and the changes in threshold voltage due to the stored charge can be sensed to indicate data stored in the memory cell. Another type of charge data cell is referred to as a charge trapping memory cell, which is used a dielectric layer in place of the floating gate.
The term “write” as used herein describes an operation which changes the threshold voltage of the transistor, and is intended to encompass operations for increasing and for decreasing the threshold voltage of the transistor. In EEPROM and in flash, write operations involve a first erase step, to set all the cells in the memory segment to an erased state, followed by a program step, to set selected cells in the memory segment to the programmed state. The term “program” as used herein refers to an operation which can be carried out in flash memory on a bit-by-bit basis, while the term “erase” as used herein refers to an operation which, due to the configuration of the flash memory cells, is carried out typically in flash memory on a sector or block basis. Therefore, in flash memory, to program a single byte, the write operation must first erase a larger sector of the memory array, and restore the data for the entire sector.
In an EEPROM device the memory cells can be erased on a byte-by-byte basis, independent of the other data bytes. However, to enable erasing on a byte-by-byte basis, the memory density of EEPROM is relatively low.
EEPROM and flash memory devices are often used for different applications. Generally, because of its higher density, flash memory is more economical than EEPROM in mass data storage applications. EEPROM is commonly used in applications where programming and erasing small amounts of data is needed, such as for storing status data, configuration data that must be changed from time to time, and the like.
A variety of electronic devices include both EEPROM and flash memory, in order to fulfill different memory performance requirements required of various functions of the device. However, using both of these types of memory increases the cost and complexity of the device.
A specific issue arising in flash memory is limited endurance, the number of erase and program operations over which the cells in the device remain operative and reliable. Thus, repeated and frequent writes to a single sector, or a small number of sectors, will result in some of the sectors becoming defective in a relatively short time.
Various “wear-leveling” techniques have been proposed for extending the lifetime of flash memory. One wear-leveling approach involves the use of counters to track the number of times each sector is erased. The counters are then used to alter the mapping of data into the various sectors, to even out their wear. See, for example, U.S. Pat. Nos. 6,000,006; 5,485,595; and 5,341,339.
Although the use of counters can extend the lifetime of flash memory devices, the problem of limited endurance continues to preclude the use of flash memory in applications requiring a large number of write operations.
Another wear-leveling approach is to write updated data to an unused physical location in the flash memory device, rather than overwriting old data in the original location. This reduces the number of sector erase operations for a given number of write operations to the flash memory device. See, for example, U.S. Pat. Nos. 5,845,313 and 6,115,785.
In order to track the changes in the physical locations of the data, a programmable mapping or address translation table can be used. The programming mapping table stores mapping information between the logical addresses specified by an external system and the actual physical addresses of the flash device containing the valid data. In order to accurately track the physical locations of valid data, the programmable mapping table is updated during operation.
To ensure that valid data is preserved, the mapping information must be preserved when power is no longer being supplied to the flash device. However, since the programmable mapping table is continuously being updated, storing the mapping information in the flash memory reduces the life of the device due to its limited endurance. This can also significantly impact the performance of a system utilizing flash memory, due to the relatively slow erase cycle of the flash memory. The programmable mapping table may alternatively be stored in another non-volatile memory circuit on the flash device. However, this increases the cost and complexity of the flash device.
It is therefore desirable to provide flash memory devices for applications that often require performance characteristics of EEPROM like high speed byte access, while also addressing the issue of endurance with reduced complexity and cost.